I spent some time with the wave generator, and refreshing my understanding of the RP2040 DMA.
I’m sure there’s a reason this won’t work, but here’s my approach to the logic analyzer:
- 2 DMA channels chained together write to the same big buffer non-stop.
- PIO matches trigger condition (level or edge? sig-rok SUMP only supports levels)
- PIO begins deincrement of post-trigger sample count
- PIO halts DMA when count = 0
- Detect DMA stop and current address (hopefully), read out samples
Most of the other PICO LAs I’ve seen lean heavily on the example from the SDK (single PIO instruction, ping-pong DMA, software triggers). GusmanB’s makes heavy use of PIO, but for massive parallel triggers. I’m probably missing something key if everyone else does it differently.