Help me test the flashrom v1.7 binary build

@ian In January 2027 we’ll release Flashrom 2.0, dropping a lot of things. Don’t worry, I’ll take care of the Bus Pirate legacy part and the serial part (it was suggested we drop it (serial…), but I’ll keep maintaining it so everything still works…). People from flashrom staff have asked if I want to add support for the new modern Bus Pirate. I can do it no problem…

but do you think it’s worth it? I mean FlatBuffers… Flashrom is a project where things take time and they have to be done right… Maybe the legacy part is enough? What do the rest of you think? Is the effort worth it?

  • Is the legacy part enough?
  • Implement FlatBuffers so we can easily use everything from the outside, specify max current and voltage, and make it all simpler. Dreg! you lazy ass!
  • Legacy part as is enough
  • I’m lactose intolerant
0 voters
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Defo flat buffers. There is tooling in a lot of languages, and you can use every feature in a systematic way. Legacy is very hackish and extending it in the future is going to be difficult .

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seconding that. that would also solve the limit of locking into voltage on entering binmode and not being able to use the “no PSU” mode for stealing the voltage from tharget

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I’m now also the official maintainer of flashrom on Windows. Nobody else volunteered, so I did.

Starting with flashrom 2.0, due in early 2027, I’ll make sure the Bus Pirate and all the other programmers work properly on Windows.

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Just found this project @Dreg :

…“# Configure chip identity (uses rflasher chip database)
spi-flash-tool configure W25Q128JV --chips-dir ~/src/rflasher/chips/vendors”

And sorry for not yet testing flashrom

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Super short DIY cable for SPI flash. BPv3 nostalgia :smiling_face:

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@AreYouLoco I don’t think I have enough IQ to do things with FPGAs :smiling_face:

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the github explains how to use it. its a ready-to-use project.

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It’s not that FPGAs are inherently more difficult, it’s just that they have constraints, and those constraints are hard to understand for us first-timers, and the tools typically are unique for each vendor, resulting in reduced knowledge transfer when changing suppliers.

Plus, most times us “software folk” don’t need the hard-real-time response that an FPGA provides, so it’s just easier to do stuff without real-time constraints.

For emulation of a flash device, the linked project is amazing. Yes, it’s an investment to learn. At the same time, with your expertise in flash device behavior (aka weirdness, protocol bugs, half-baked implementations, …), you might find the project to give long-term value, especially if you create a library of those quirks.

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