Here are the REV0 updates:
- Move RBG CDO up to the 0…32 range so we can use the extra PIO on the buffered Io pins.
- uses I2C DAC to set voltage and current levels instead of PWM (claim 2 pins)
- adds I2C IO expanders for 4 possible values of pull up or pull down (and combinations) assignable per pin
- Add 8MB (?) PSRAM that can be memory mapped for a luxury logic analyzer.
- DFN opamps and other tweaks for space and manufacturability.
- A small circuit to allow the bootloader button to be reset or bootloader depending on press length
Coincidentally, someone has already gotten the PSRAM working.
I fully expect this to be a quickly discarded REV. I would have built it ages ago, but we couldn’t get the RP2350Bs in the market until a few weeks ago (and then it was Spring Festival holiday).
I have no problem making drastic code or pin changes between REVs, in fact I relish it 