Bug report - SPI clk polarity ignored

SPI clock polarity setting seems to be ignored (only tested in follow along analyzer mode) - idle high mode doesn’t work.

Also seems to cause an error when asked if you want to reuse the previous settings (the line for clock polarity says "1 to 62500khz)

Use previous settings?
SPI speed: 100 kHz
Data bits: 8
Clock polarity: 1 to 62500kHz
Clock phase: LEADING edge
Chip select: Active LOW (/CS)

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Thank you for t he bug report, I’m looking into it now.

Thank you so much, again, good find. That was a weird one. It should be fixed in a firmware posting in just a few seconds.

The polarity setting was pushed up a bit (<<1). I can only imagine this was something left over from the v3.x code base.

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