Internal I2C bus, DACs, individual pull-up/downs, other wishlist items

OK… here’s a strawman proposal, so if you don’t like it, suggest something different:

pin pullup Resistance Pin [Pin [Pin [...]]]
pin pulldown Resistance Pin [Pin [Pin [...]]]
pin float Pin [Pin [Pin [...]]]

Where float means to disable the pullup/pulldown.

click to expand...

If disabling is not a separate command, and uses the disable keyword with either pullup / pulldown, then you have the wierd question of what happens in the following sequence:

pin pullup 1.3k 3 5
pin pulldown disable 3
pin pulldown 0k 5
  • the second command’s text implies that it disables a pulldown. Since it’s currently not being pulled down, the interpretation has multiple options: It might do nothing, or it might disable a pullup, which is … weird.
  • The third command’s text implies that it sets the pulldown to zero. Since it’s not currently being pulled down, the interpretation has multiple options: It might do nothing, or it might disable a pullup, which is … weird.

Thus, I propose it is better to have the second parameter to pin essentially be a mode in which to set the pin(s). No confusion.


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Coming along. The inside layers currently have no traces, jut one ground plane and a power plane.

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image

REV0a is routed, and pushed to github. I still need to:

  • Silk tweaks
  • Add I2C 7 & 8 bit addresses to schematic
  • Buffer series resistor value
  • Short/long press button components values
  • Source new parts

Parts to source and values to be determined

Item Qty Reference(s) Value LibPart Footprint
9 9 D10, D11, D12, D13, D14, D15, D16, D17, D18 DESD5Z5.0 Device:D_Zener_Small_Filled Diode_SMD:D_SOD-523
8 9 D1, D2, D3, D4, D5, D6, D7, D8, D9 BAS40-04 Diode:BAS40-04 Package_TO_SOT_SMD:SOT-523
53 5 U9, U10, U11, U12, U13 LM358_DFN Amplifier_Operational:LM358_DFN Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP1.05x1.75mm
52 1 U8 APS6404L-3SQR-ZR dp-memory:xm25qh128a Package_SON:Winbond_USON-8-1EP_3x2mm_P0.5mm_EP0.2x1.6mm
51 2 U6, U7 TCA6416RTWT TCA6416RTWT:TCA6416RTWT qfn24-4x4x50:QFN50P400X400X80-25N
50 2 U4, U5 MCP4725xxx-xCH Analog_DAC:MCP4725xxx-xCH Package_TO_SOT_SMD:SOT-23-6
5 1 C21 10uF Device:C_Small Capacitor_SMD:C_0402_1005Metric
3 2 C6, C13 10uF Device:C_Small Capacitor_SMD:C_0805_2012Metric
28 1 R10 470K Device:R_Small Resistor_SMD:R_0402_1005Metric
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Did you hear anything about availability and pricing of the 3Peak TPC5120 ADCs?

You can also look for the ADS7953 from TI. These are also available with just 12 channels, ADS7952.

When you compare the datasheets, you clearly see where 3Peak got the inspiration from - the specs are nearly identical.

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No, I haven’t had a chance to investigate the SPI ADC further yet. We’ll get the quote tomorrow though.

I have a few scattered thoughts on the SPI DAC. Such as, using the 4 MUX address control bits as a second SPI bus dedicated to the ADC. It would avoid a lot of the complexity of sharing one bus with LCD and NAND while maintaining similar speeds as the internal ADC.

For the BP7 REV0A:

  • Will swap the 10uF for the switch circuit with a 4.7uf and the lower value resistor
  • 68R ohms series resistor on the pins?
  • This morning we managed to find a supply of the 2Gbit NAND, so the prototypes will be populated with that
  • Board will go out tomorrow
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BP7 REV1 pushed to git.

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3 BOM agencies couldn’t find the 3 Peak spi ADC. Our regular guy says that 3 Peak isn’t hard to source, just this part doesn’t seem to be available. I know it’s on szlcsc, but Jin says nobody can find it.

I’ll happily be an early purchaser/tester of this when available.

Hmm, it would be quite a good fit in my opinion.

Could you try to directly contact their sales department? Maybe they can redirect you to a distributor that stocks it or sell it directly.

We had a couple led-mini-e short to ground in the latest batch of boards. It might be a good idea to add a resettable fuse to the LED string.

Isn’t this just an issue during production? Or do you expect that this will pop up later in the field?

When it is just during production: wouldn’t it make more sense to do the first powerup with a proper lab power supply that has OCP configured? Especially since you don’t have much board space to spare for additional fuses. It could also affect a different cirucit in the next batch, so you’d end up with many polyfuses.

The OCP testing is is what we do at work. There the power supply is also queried by the jig control software for current draw and so on, but this isn’t really necessary if it is not part of your test plan.

You could just use the lab PSU it in a preconfigured setting for 5V and the OCP. Then wire up a special cable from the banana plugs of the lab PSU into USB-C that is plugged into the BP. When the OCP triggers the BP goes into the fail-bin.

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We’re gearing up production of the initial test board (7REV0). Boards will go out tomorrow, and hopefully we receive the RP2350 chips. I also need to clean up the BOM and highlight the changes and new parts to source. Then there is the issue that are reels are currently all at assembly, so we’ll be pretty slow.

REV0 is a throw-away board for testing the new I2C stuff, miniaturized analog area and PSRAM.

REV1 is in progress and includes additional power and pin protection.

Both revs should be in the hardware git.

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