Now that we’re finally over the Bus Pirate 6 incident, I’ve been thinking a bit about the update wishlist we started over in a different thread.
If you missed that discussion, the gist is that I don’t plan to make any more Bus Pirate 6 using the RPi beta program. That gives us a bit of time to play around with some design modifications until the chips are released to the public.
This is not a replacement for Bus Pirate 6, as it simply doesn’t exists. When will this hardware be available? Never, or whenever, it’s just for fun, get a Bus Pirate 5 or 6 (while they last) for now.
- New (or no) LED arrangement
- Memory mapped PSRAM on QSPI bus
- Swap RGB_DO and FLASH_CS so all 3 PIOs are in reach of the main buffer driver pins (gpio0…15)
- Front end cleanup: rerouting, add protection to GND on the front end op-amps. Add TVS diodes to all IO pins.
- joystick or enhanced button
- 2gbit nand
- TCA/PCA6416 for individually addressable pull-X in multiple values
- Further lower the IO pin series resistors (currently 120, maybe 70ish?)
- Move RN400 and RN401 to improve manufacturability
We currently have: 1 free pin
Memory mapped PSRAM
I think this an easy update, and the chips are cheap. It will consume 1 GPIO pin for CS.
We currently have: 0 free pins
Internal I2C bus
There is already an internal SPI bus. With an additional I2C bus we can add some simple slow speed peripherals.
Individual per-pin pull-X
As suggested by @electronic_eel, we can use a 16 pin PCA6416 I2C IO expander to have individually configurable pull-up and downs. These would replace the PFETs, and they’re a tiny 4x4QFN so there is space.
It makes sense from a routing perspective to use two, one on each side of the IO connector. Each pin will have 4 possible pull-X values. What should those be? I have no idea
- 1M pull-down (to replace the current fixed pin “termination” resistor)
- 10K pull-down
- 2K pull-up
- 10K pull-up
- 470K pull-up
Maybe the 1M termination resistor should stay fixed? But that would make the 470K less appealing.
It may need a shared RESET pin for reliable performance.
We now have: 1 free pin (pull-up enable), need 2 or 3
I2C DACs for power supply
Currently the adjustable power supply is driven by 2 RP GPIO PWMs. These could be replaced by a simple DAC like the MCP4725 (12 bit). That would free two IO pins, and remove an op-amp and a couple passives. It also makes me happy because I don’t like running those PWM signals across the PCB.
The trade off is these are comparatively expensive, but I need to call the scalper and see what they actually cost in the market. There are 8/10/12 bit versions, the 12 bit may add 1-2 USD to the BOM cost.
We now have: 3 free GPIOs, we need 2 or 3 (yeah!)
Prototypes
Our CAD guy seems super busy right now, so I don’t think any of this will happen soon. With your feedback though, I’d like to get the changes made to the schematic so we have something to make notes on.