Logic Analyzer development


bus_pirate-pico-sdk-sigrok.zip (132.2 KB)

This is a test firmware for pico_sdk_sigrok. The logic analyzer blocks all the other Bus Pirate functions in this test, it will be integrated soon.

This is a continuous sample logic analyzer, and all triggering is done in the sig-rok client. It uses run length encoding to compress the samples and achieve higher speeds with the limited USB CDC bandwidth.

On my setup, speeds up to 2.5MHz are sustainable on a slow bus.

While small (<100K) samples can run up to 120MSPS, since there are no hardware triggers it just takes records immediately and dumps back to sig-rok.

Enabling the analog channel (o-scope) drops the max speed to 500ksps.

Sig-rok patch

The pico_sdk_sigrok project requires a patched version of sig-rok. The project has a patch accepted to sig-rok for testing. Linux folks cam probably compile it without much trouble, for Windows a compiled version is available


Two UARTS will connect in this firmware. The lower number is the debug terminal, the higher number is used by sigrok. It’s probably a good idea to open a terminal and view the debug info, otherwise the USB buffers may fill up and the Bus Pirate will freeze.

Remember to power the buffer

Put some kind of voltage on the VOUT/VREF pin to power the Bus Pirate IO buffer or the logic analyzer won’t record anything. This allows compatibility with a wide range of logic levels in the 1.8-5.0volt range. In the future it would be nice to use the Bus Pirate power supply and allow the voltage to be set from the sig-rok client.