Tested the latest pull request. It looks good on both 1gbit and 2gbit. Works with the existing filesystems, and also after formatting both devices. I did a quick write and read test and it seems consistent.
Will merge with main now. Future firmware will support both chips.
The update is QOL for me, thank you. I’ve been making a mess of updates to CMakeLists and repeating them three times for each build has been exhausting 
Yes - that big buffer is the shared max-addressable by DMA chunk of RAM for the scope and logic analyzer.