ok, seems like the XL9555QF24 is the one to go for.
I’m not sure if the NOR-flash in SOIC-8-wide will stay put just with surface tension reliably. And since it is one of the largest ICs on the board it would be a prime candidate to move to the top for saving space.
Won’t make it any easier if you have to change factories for this 
On the other hand the VOUT protection is a bunch of tiny passives that would probably stick well, and would require less modification to the enclosure tooling.
Yes, this could work. We’d have to put them on the pin-header side of the LCD though, not next to the USB-C connector. Otherwise routing the signals all across the board would be a nightmare. Let’s hope there is enough space for this there.
VOUT comes from the button side and routes down under the Io buffers. Some parts need to be close to VOUT pin, but I suspect a bunch could go directly over the adjustable vreg near the button.
But, let’s wait to see what happens with the SPI ADC. That will open a lot of space.
I’ve had a few discussions with Supul, who routes our boards, and routing is tight. The additional of the IO pin TVS diodes and change of series resistor location created 8 trances that connect in 7 or 8 places. It’s not that the routing is impossible, but all the vias are breaking up the good ground plane.
We’re discussing some of the same things we’re been over here:
Routing has begun on 7R1.
Quad op-amps will be evaluated to see if they are easier to route.
The change to current_detect will be included in this revision.
We will not change the analog mux unless required to complete routing.
| Note | Qty | Reference(s) | Value | Package |
|---|---|---|---|---|
| New | 1 | D10 | SMF5.0A | Diode_SMD:D_SMF |
| Package change | 3 | Q1, Q2, Q5 | 2N7002KT | Package_TO_SOT_SMD:SOT-523 |
| Package change | 8 | R13, R14, R15, R16, R17, R18, R19, R20 | 120R 0.5W | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder |
| Value change | 2 | R202, R203 | 27R | Resistor_SMD:R_0402_1005Metric |
| New | 1 | U4 | XL9555QF24 * | Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm |
| Potential change to QFN | 6 | U5, U9, U10, U11, U12, U13 | LM358_DFN** | Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP1.05x1.75mm |
| New | 3 | U14, U15, U16 | SP3002-04JTG | Package_TO_SOT_SMD:SOT-363_SC-70-6 |
| Fix part number | 1 | U105 | MT29F2G01ABAFDWB : MT29F2G01ABAGDWB-IT:G? | dp-memory:U-PDFN-8 |
* Alternate parts for XL9555QF24:
| Part Number | Quantity | Unit Price | Full Reel Quantity | Reel Unit Price |
|---|---|---|---|---|
| PI4IOE5V9535ZDEX | 100 | 2.5元 | 3500 | 2.3元 |
| TCA9555RTWR | 100 | 2.8元 | 3000 | 2.6元 |
| XL9555QF24 | 100 | 2.2元 | 3000 |
** Supul may substitute WS72324Q, depending on routing
Notes from 7R0
We no longer have a 1M pull-down when VOUT is not powered, so the leakage through the op-amp protection diodes is a problem again. Floating pins hover at ~2volts.
A super easy change is to add a 1M pull-down to all pins and change the pullx to another value. This defeats some of the impedance (?) testing stuff I imagine.
Second option: an 8bit I2C IO expander powered from VUSB or 3.3V with 1M pull-down on all pins that is enabled at start-up, and disabled when pullx is enabled.
Working, but it is eliminated in next rev, so I’m not going to mess with it much.
A bit of a mystery to me.
I need to get used to it, but sometime the long press still seems to reset instead of bootload. This could be a me issue.
Seems to work, as expected based on @henrygab 's earlier work.
Here is an 8 pack of FETs in 1.5*1.5qfn that could handle the pulldown. common gate and source, so it would be all or nothing.
The only 8bit I2C expanders I can find use the same I2C addresses we already occupy.
This sounds like you already have received your 7R0 sample? Or do you have remote control to one that is in the China office?
hmm, when is this case an issue?
This is just an issue when you have VOUT switched off and you want to use the ADC to measure the voltage on the IO pins. A floating pin will not give you any meaningful measurement result. But the values are shown on the screen, so for users that are not accustomed to this behavior for example from their multimeter, it would be nicer to show 0V.
Or am I missing some real hard issue with this?
I’m not sure if it is worth adding extra components like FETs just for this case. Once we have the Vout protection, we could just power the internal voltage regulator with 3.3V and keep the Vout protection disabled. This would allow to enable the 1M pulldowns, but keep the Vout-Pin off. But you’d then need some extra command to allow powering Vout from the outside which currently is always possible.
Another way to deal with this would be to use a permanent higher impedance pulldown. Is this leakage still an issue if you use for example a 10Meg pulldown?
I’m currently a bit reluctant to use a permanent 1M solution. But I guess I need to work with the new impedance test function a bit to get a better idea how it behaves and how a permanent pulldown would affect it. So I might change my opinion on this point.
Edit: I guess I should have read the other thread first…
Yes, the hardware arrived this morning.
Excellent point about the VOUT, that does completely eliminate this whole issue. And the opamps might be replaced by 15pf caps (TBD) with the SPI ADC.
Yes, the floating pins are 100% a cosmetic, marketing, support and UX issue.
The first thing you need to know is that Schottky diodes are leaky and we use them to protect a bunch of opamps that prevent a glitch caused by an ancient analog mux that has a lot of inrush… So your pins are gonna float at 2volts.
I’d budget an extra part in the BOM to prevent this sort of thing 
I worry about meeting user expectations and streamlining learning. If it were just me I wouldn’t care (that’s probably a lie).
I will conjure up a 10M resistor and see if that is sufficient.
I’m going to try to keep bug fixes here, and bring up (firmware) in the REV0 thread.
Some potential chips to add 1M pull-down when pullx isn’t powered:
It looks like the board rework opened a bunch of space. I don’t know how much, but we were able to use 8 of the XL9555 IOs to provide the 1M pull-down when VOUT is not active. Hopefully we see the board soon.
I pushed a new branch for 7R1:
Nice. And very good to hear that the layout seems to fit in the existing board size without major schematics rework and even more expensive components.
This is a very good thing: Since the XL9555 IOs are full IOs, they also can pull up to 3.3V if you want them to.
So there would probably be the option to replace the 1M pulls on the TCA6416ARTWR with these and use something like 100k there. With 1M the exact voltage used doesn’t matter that much and the risk of destroying something due to too high voltage is negligible.
Another thing that could be added to 7R1: increase the core voltage like mentioned in the clock speed thread. Not to permanent 1.2V, that would be too risky in my view. But a permanent 1.15V should not be too risky and probably something that would enable further speed increase, just like with the RP2040.
So how about changing the LDO to an adjustable one, for example TLV75801PDRVR?
Ace on the 1M!
If I can manage to do the routing then I will change to a adj vreg for the core. I don’t feel honest if I back fill project requirements on supul.
