Just to verify the command sequence:
If doing Option A, I think that’s normal behavior … a Start resets the starting address to correspond to the command.
If doing Option B, that’s … incredibly terrible design, and surprising.
Option B would prevent any sort of efficiency using the chip. 
What I mean is I generally (but not always!) expect I2C to be able to do this:
[0xa0 0] [0xa1 r r r r]
Set pointer to 0, read 4 bytes starting at 0. This is fairly typical. Instead we are limited to this:
[0xa0 0] [0xa1 r]
The chip is limited to reading a single register, except the PDO profiles, which all 26 bytes can be read at once.
For lots of chips this is also a completely valid I2C access:
[0xa0 0][0xa1 r:4][0xa1 r:5][0xa1 r:2]
The byte after the write address (0xa0) sets the pointer. Then, it auto increments on each read. Here we read 11 bytes ending on byte address 10. Its the partial write command that updates the address pointer, not the start sequence.
Usually! The INA2xx we looked at a while back also had single byte register access. It’s not unheard of, but I am always disappointed when I can’t dump the entire chip and look at all the registers in context.
I don’t love this. I guess we can add a 5V source connector to the board for cable testing or are we targetting sink only here?
I don’t think think this chip can do anything source wise. It has a very simplified register set with basically status, profiles, select profile, issue hard reset.
Ugh. You’re right, that’s disappointing, and make the comms much more chatty then they need to be. The auto-incrementing read for the entire readable space is a much better option.
Managed to get the AP33772S from Digikey China. Had to buy 300RMBs worth, but we managed 
@ian am heading to sz next month, any chance I can buy a proto or two from you?
Apologies if this is already in the forum
This post from cnx refers to an open source of sink library.
Sorry, I think they sent them all to me in Amsterdam.
This looks great! There are many nice stacks but they’re all C++ and we are a C project.
Just a heads up, the FUSB302B board seems to be populated with the B01 version that has a different I2C address (0x23):
I2C> fusb302 status
Device ID: 0x95
Chip: FUSB302
Revision: 5
FUSB302 Status:
STATUS0: 0x01
STATUS1: 0x28
CC1: Connected
CC2: Disconnected
VBUS OK: No
I2C> usbpd status
Source : PD source connected
CC line : CC2
Data role : UFP
De-rating : normal
VBUS voltage: 5040 mV
VBUS current: 72 mA
Requested V : 5000 mV
Requested I : 3000 mA
Temperature : 20 C
Available PDO entries: 7
PDO 1 (SPR Fixed): 5000 mV, 3000-3249 mA
PDO 2 (SPR Fixed): 9000 mV, 3000-3249 mA
PDO 3 (SPR Fixed): 12000 mV, 2500-2749 mA
PDO 4 (SPR Fixed): 15000 mV, 2000-2249 mA
PDO 5 (SPR Fixed): 20000 mV, 1500-1749 mA
PDO 6 (SPR PPS): >=3300 mV to 5900 mV, 3000-3249 mA
PDO 7 (SPR PPS): >=3300 mV to 11000 mV, 3000-3249 mA
AP33772S plank seems to work.
The level shifters for CC0/1 signals looks to be working well.
Updates:
AP33772S board is routed and going for final prototyping. Probably won’t manage to get it in volume production before Spring Festival.
I like how much smaller the final REV turned out.
@ian Adding the features of two of these devices to a plank would be $200 worth of value. A 240W adjustable PD 3.1 supply, yes please!
Also check out the ChargerLAB Power-Z KM003C for a USB PD analyser done right.
Hi @Strykar -
Really cool devices!
The current PD plank prototype does have the same USBPD chip as the picopd you linked.
The adusbcim3 is super interesting because it reads e-markers and does source/sink. That was one of my original goals with the FUSB302B chip version, but the AP33772S gives a lot of features without writing a full USBPD stack.
One small thought. It might be worth labelling the terminal block VBUS IN or VBUS OUT. We went through so many iterations on this, I think it’s out right? This USBPD chip does sink not source? Thanks. Looking forward to seeing the plank in the store.
The AP33772S USB PD sink plank seems to be ready for a small initial production. Everything checks out.
usbpd command docs are now online, with screen casts and terminal snips.
I think the feature I like most is the level shifting on the CC pins so we can capture the activity with a cheap logic analyzer.
I will slip this into the final gerber 
Now to document the plank.
USB PD adapter plank documentation page is drafted.
