DDR4 and DDR5 parameter table reader

Development
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I2C> ddr5 write -f udimm.bin
Write SPD NVM from file: udimm.bin
Device Type: 0x5118
Write Protect Override is enabled, proceeding with write
NVM block lock bits cleared, proceeding with write

It’s REALLY messy, but write now works. I wrote the dump of the udimm module into the sodimm module.

SPD EEPROM JEDEC Manufacturing Information blocks 8-9:
Module Manuf. Code: 0x859B (Crucial Technology)
Module Manuf. Location: 0x00
Module Manuf. Date: 22Y/04W
Module Serial Number: 0xE6FFB785
Module Part Number: CT8G48C40U5.M4A1
Module Revision Code: 0x57
DRAM Manuf. Code: 0x802C (Micron Technology)
DRAM Stepping: 0x41

Running the probe command on the SODIMM (SK Hynix laptop memory) now shows that it is a Crucial UDIMM :wink:

Next I’ll do a massive cleanup on this code, which will probably result in at least two new system wide abstraction layers for working with I2C and files.

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This turned into a beast of a command, but I think it was worth it as a template for future similar commands.

The DDR5 command is in the main firmware now, I believe it is complete (for now). Next I’ll do the docs while it’s fresh in mind so we don’t fall behind again.

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amazing this produck

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Draft documentation is live. It’s very much a framework that still needs fleshing out, there’s no snips or casts and a lot of the text is still in outline form.

I think I can finish this up in one more day.

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Argh! Couldn’t do it, but got it mostly done:

TODO:

  • Write the two opening paragraphs for DDR5 demo. Don’t have enough juice in the tank for that kind of editing right now.
  • Plank adapter page (need to finalize the hardware first)
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REV1 board routed:

  • Swapped PWR and PGOOD LEDs, I think that makes more sense logically.
  • Changed 2K pull-ups to 10K
  • Changed 2N7001 FET to BSS138 (future update: use dual package BSS138PS)
  • Rounded the corners
  • Will be made on 2mm thick PCBs for strength

We of course need to test this revision, but I think this is production ready.

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