Continuing the discussion from Port protection for Rev7:
Hi Ian, what changes are you expecting to make in the BP7 (vs. BP6)?
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So first of all, this isn’t anywhere close to release. It’s just a group discussion that creates prototypes as a byproduct. The first routed board was completed in October or November but there were no RP2350B to buy, and I wasn’t going to buy a full reel of broken silicon under the prerelease program for prototyping if there was a chance they might have a stepping.
There’s a couple threads discussing what people are interested in. I couldn’t find the main one earlier, so posted where you saw it.
We have a current completed PCB prototype with:
- Move RBG CDO up to the 0…32 range so we can use the extra PIO on the buffered Io pins.
- uses I2C DAC to set voltage and current levels instead of PWM (claim 2 pins)
- adds I2C IO expanders for 4 possible values of pull up or pull down (and combinations) assignable per pin
- Add 8MB (?) PSRAM that can be memory mapped for a luxury logic analyzer.
- DFN opamps and other tweaks for space and manufacturability.
- A small circuit to allow the bootloader button to be reset or bootloader depending on press length
Note on this one: all those I2C chips are properly brand name and not cheap! This is a fantasy BOM because the new additions almost double the current BOM cost. It is not cost optimized, but more a luxury board with excessive perks 
There is a revision under way with some ruggedizing:
- TVS diodes on all IO for +/- 12 volt maximum tolerance. The part has been smoke tested by @electronic_eel and selected.
- A rather interesting ruggedized power supply that is +/-12 volt tolerant, with a replacement for the back flow switch and a small negative voltage charge pump to control a FET over a wide voltage range. This was also designed by @electronic_eel and you can find a post with a render of the test board for the circuit.
This is where our discussion left off, around the holiday when everyone got busy/was away from keyboard.
At this point I’m very happy because we got a small quantity of rp2350B and can finally spin some REV0 boards. Then we can test it, see what the firmware build out will take, etc. As you can see, this is not a priority project, more a hacker space hobby horse with no actual timeline.
I may attempt to round up the rev7/BP7 threads tomorrow, but I really want to get the IR stuff done as it’s taken 4* as long as I anticipated.
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am i the only one who likes saving stuff to sdcards ;-/ please dont retire my attic revision 8 firmwarez
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It’s still supported! Glad you like it.
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As usual, once these are ready for release, I’ll purchase immediately.
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May I recommend one additional item?
On RP2350 boards, program a block of the OTP at the factory
And also… integrate this into the current BP6 manufacturing process, because it has benefits for the user and for issue triage.
Why…
- White labeling the BOOTROM (I will create a post on that)
- See datasheet 5.7 … ~p405
- Nicer experience for everyone finding the right UF2 volume
- Links to you … NOT links to raspberrypi.com
- Model Information
- Avoiding hacks like needed for BP5_Rev8 vs. BP5_Rev10 detection … just read the OTP data
- Manufacturing information
- Make it easier to track problems back to date, time, and other manufacturing tidbits
I’ll create another linked post with initial thoughts for BP6 OTP programming.
I just ordered a bunch of RP2350 PICOs to test this with (since OTP programming is … mostly one-time), so while it’ll be a week or so before I can test, I think it’s going to be fairly straightforward.
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