Continuing the discussion from Port protection for Rev7:
Hi Ian, what changes are you expecting to make in the BP7 (vs. BP6)?
2 Likes
So first of all, this isn’t anywhere close to release. It’s just a group discussion that creates prototypes as a byproduct. The first routed board was completed in October or November but there were no RP2350B to buy, and I wasn’t going to buy a full reel of broken silicon under the prerelease program for prototyping if there was a chance they might have a stepping.
There’s a couple threads discussing what people are interested in. I couldn’t find the main one earlier, so posted where you saw it.
We have a current completed PCB prototype with:
- Move RBG CDO up to the 0…32 range so we can use the extra PIO on the buffered Io pins.
- uses I2C DAC to set voltage and current levels instead of PWM (claim 2 pins)
- adds I2C IO expanders for 4 possible values of pull up or pull down (and combinations) assignable per pin
- Add 8MB (?) PSRAM that can be memory mapped for a luxury logic analyzer.
- DFN opamps and other tweaks for space and manufacturability.
- A small circuit to allow the bootloader button to be reset or bootloader depending on press length
Note on this one: all those I2C chips are properly brand name and not cheap! This is a fantasy BOM because the new additions almost double the current BOM cost. It is not cost optimized, but more a luxury board with excessive perks 
There is a revision under way with some ruggedizing:
- TVS diodes on all IO for +/- 12 volt maximum tolerance. The part has been smoke tested by @electronic_eel and selected.
- A rather interesting ruggedized power supply that is +/-12 volt tolerant, with a replacement for the back flow switch and a small negative voltage charge pump to control a FET over a wide voltage range. This was also designed by @electronic_eel and you can find a post with a render of the test board for the circuit.
This is where our discussion left off, around the holiday when everyone got busy/was away from keyboard.
At this point I’m very happy because we got a small quantity of rp2350B and can finally spin some REV0 boards. Then we can test it, see what the firmware build out will take, etc. As you can see, this is not a priority project, more a hacker space hobby horse with no actual timeline.
I may attempt to round up the rev7/BP7 threads tomorrow, but I really want to get the IR stuff done as it’s taken 4* as long as I anticipated.
4 Likes
am i the only one who likes saving stuff to sdcards ;-/ please dont retire my attic revision 8 firmwarez
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It’s still supported! Glad you like it.
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As usual, once these are ready for release, I’ll purchase immediately.
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May I recommend one additional item?
On RP2350 boards, program a block of the OTP at the factory
And also… integrate this into the current BP6 manufacturing process, because it has benefits for the user and for issue triage.
Why…
- White labeling the BOOTROM (I will create a post on that)
- See datasheet 5.7 … ~p405
- Nicer experience for everyone finding the right UF2 volume
- Links to you … NOT links to raspberrypi.com
- Model Information
- Avoiding hacks like needed for BP5_Rev8 vs. BP5_Rev10 detection … just read the OTP data
- Manufacturing information
- Make it easier to track problems back to date, time, and other manufacturing tidbits
I’ll create another linked post with initial thoughts for BP6 OTP programming.
I just ordered a bunch of RP2350 PICOs to test this with (since OTP programming is … mostly one-time), so while it’ll be a week or so before I can test, I think it’s going to be fairly straightforward.
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Hello,
can i see firmware for 7-REV1 on github ?
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Hi alex,
There’s no v7 hardware prototype yet so we haven’t started firmware support yet. Maybe in 4 to 5 weeks there will be some basic support in the main firmware repo. All hardware uses the same code base.
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Nice!
Please keep in mind that we have not done any testing, and the current REV1 PCB in the repo is an incomplete work in progress. REV0 is complete but with known bugs. The firmware and hardware will change as we advance through the prototypes.
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OK, now i only check PSRAM and now test MT29F1. Not sure that design base board quickly, so I’ll have time to change it.
2 Likes
Let me know how it goes with the psram. If you have any code integration feel free to make a pull request
To start the new firmware for 7:
- copy platform/bpi6-rev2 c and h files to bpi7-rev0
- in pirate.h add include for this version,.With some kind of new BP_VER
- in cmakelists follow the way BP6 is created and make a new BP 7 target that includes the new platform files.
- in the platform .h file adjust all the pin number defines to match the 7 pinout
- there will be a lot of adjustment for current #if BPVER = 6, etc. But they shouldn’t need to be done all at once.
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I tested PSRAM with arduino, not with BusPirate.
Thanks for the tutorial, I will try and integrate PSRAM into BP later.
I will send you the code later.
Thanks !
2 Likes
feature request: camo led theme
1 Like
PSRAM works fine. Add simple test at start
static void main_system_initialization(void) {
...
softlock_all_otp();
#ifdef RP2350_PSRAM_CS
#define LED_PIN 25
gpio_init(LED_PIN);
gpio_set_dir(LED_PIN, GPIO_OUT);
gpio_put(LED_PIN, 0);
#define BLOCK_SIZE (size_t)(128 * 1024u)
uint32_t *mem1 = __psram_malloc(BLOCK_SIZE);
if (mem1 == NULL)
while(1)
gpio_put(LED_PIN, 1);
for (int i = 0; i < 1024; i++)
mem1[i] = 0xCAFEFEED;
for (int i = 0; i < 1024; i++)
if (mem1[i] != 0xCAFEFEED )
while(1)
gpio_put(LED_PIN, 1);
uint32_t *mem2 = __psram_malloc(BLOCK_SIZE * 2);
if (mem2 == NULL)
while(1)
gpio_put(LED_PIN, 1);
for(int i = 0; i < 2048; i++)
mem2[i] = 0xDEADBEEF;
for(int i = 0; i < 1024; i++)
if (mem2[i] != 0xDEADBEEF)
while(1)
gpio_put(LED_PIN, 1);
__psram_free(mem1);
__psram_free(mem2);
while (1)
{
sleep_ms(250);
gpio_put(LED_PIN, 0);
sleep_ms(250);
gpio_put(LED_PIN, 1);
}
#endif
HiZ> i
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
Bus Pirate 7
https://BusPirate.com/
Firmware main branch @ unknown (Feb 18 2025 00:49:49)
RP2350B with 512KB RAM, 128Mbit FLASH, 8192 PSRAM
S/N: 5534046F9A92AC7D
Storage: Not Detected
Configuration file: Not Detected
Active binmode: SUMP logic analyzer
Available modes: HiZ 1-WIRE UART HDUART I2C SPI 2WIRE 3WIRE DIO LED INFRARED JTAG
Active mode: HiZ
Display format: Auto
HiZ>
2 Likes
Nice! And you added a lib that does malloc in psram?! Wow!
What have you used it for?
Have you done anything with the PSRAM? I’m just curious how you plan to use the PSRAM.
My idea is very long logic analyzer buffer, but I’m sure there are other ideas out there.
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The logic analyzer buffer is probably the most useful feature for it.
What could also make sense is to use it for the scope mode and use it to store single-shot waveforms that you then can zoom around in or transfer to the pc. The scope mode could generally get more usable when we upgrade the ADC in Rev7.1 or 7.2.
Still no GSPS of course, but even 1 MSPS with a bit of sample memory behind it would be usable for a lot of applications. Like take a look at the signal form with the scope mode first and when you know how it looks like switch over to logic analyzer.
Another feature for the PSRAM could be a sample buffer for PWM or PDM modulation.
1 Like